EP681 | 🦉
- Heavy market corrections prompt capital rotation into defensive, low-PE "old AI" ODM stocks and large-cap cash havens.
- Advise managing leverage carefully and treating the current volatility as a range-bound consolidation phase.
- AMD's upcoming Venice server CPU is poised to rapidly capture market share from Intel due to production delays on competing chips.
- Agentic AI workflows are driving higher CPU adoption ratios, leading to notable ASP increases for sockets and co-components.
Portfolio Defense and Trading Psychology in Market Drawdowns
With the recent market drawdown pushing major tech stocks into corrections of 30% to 40%, managing leverage ratios is paramount to preventing portfolio stress from impacting personal and family well-being. Historically, during rapid corrections, institutional capital rotates out of volatile mid-caps and into safer, liquid names like TSMC or broad indices, waiting for sentiment to stabilize before re-entering more active positions.
In this high-volatility regime, multiple compression has heavily punished high-PE growth stocks. Consequently, "smart money" is shifting toward defensive plays backed by solid near-term earnings, such as low-PE "old AI" hardware manufacturers (primarily ODN names trading around 10x forward PE). Investors should treat the current market environment as a range-bound consolidation rather than a secular bear market, avoiding chasing breakouts and prioritizing capital preservation.
The host doesn't stop at "buy defensives after a selloff." He first classifies the tape as range-bound, then derives the playbook from that call: don't chase, wait for earnings, preserve capital. That sequence matters because regime diagnosis should come before stock selection. When you hear "money is rotating," ask whether the speaker is describing a trading range or a lasting trend change.
Tech Earnings and Google's Inference Silicon Strategy
Market expectations for the upcoming earnings of Google remain relatively muted, meaning any lack of negative surprises could trigger a neutral-to-positive reaction. Recently, attention has turned to its custom Frozen V2 silicon, which industry investigations confirm to be the TPU Inference Accelerator (TIA) chip designed by Marvell. This chip serves as a dedicated inference hardware component within Google's broader TPU framework.
While this custom ASIC represents a significant milestone for its merchant design partners, its impact on Google's consolidated bottom line is negligible. Rather than buying Google for this specific silicon play, investors should look to the underlying hardware supply chain for components directly benefiting from its deployment. In an environment where structural revenue growth dictates stock performance, these custom silicon contracts will provide meaningful, recurring fundamental support.
The useful discipline here is separating technological importance from earnings materiality. A custom chip inside Google can be strategically interesting and still be too small to move consolidated profits, which is why the host shifts attention to supply-chain names with direct revenue exposure. That's a transferable filter: before treating a product headline as a stock thesis, ask where it actually lands on the income statement.
AMD's AI Showcase and Competitive CPU Advancements
AMD's upcoming Advancing AI keynote by CEO Lisa Su is a critical catalyst for the semiconductor sector. The market anticipates announcements concerning expanded deployments with major hyperscalers, including Microsoft's Azure—which is deploying AMD's Helios server cabinets—along side Meta, Oracle, and the AI pioneer Anthropic (referred to as Amplify/AmpliPick in early reports). This adoption demonstrates that AMD has narrowed the software usability gap that previously protected its main competitor's ecosystem.
Furthermore, AMD will formally unveil its next-generation Venice server CPU on the SP7 platform. Given AMD's steady market share gains and the launch delays of competing server chips from Intel—whose Diamond Rapids and Clearwater Forest platforms are delayed into late 2024 or early 2025—AMD is well-positioned to capture significant high-margin enterprise market share. The Venice processor is expected to face immediate supply-side constraints due to robust demand.
Rising CPU Intensity and Component ASP Re-Ratings
As workflows transition toward complex, agentic artificial intelligence, server architectures are experiencing a sharp increase in CPU-to-GPU ratios. Ratios are shifting from historical 1:8 setups toward 1:4, 1:2, and even 1:1 configurations in dense high-performance computing clusters. This shift makes the CPU a critical supply chain bottleneck, with component vendors who can guarantee delivery wielding unprecedented pricing power.
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